The IEEE 1800-2017 LRM states in section 25.9 Virtual interfaces that:
Although an interface may contain hierarchical references to objects outside its body or ports that reference
other interfaces, it shall be illegal to use an interface containing those references in the declaration of a
virtual interface.
Is the following an example of such a disallowed hierarchical reference?
interface some_other_intf();
bit some_signal;
endinterface
interface some_intf();
some_other_intf intf();
task foo();
intf.some_signal <= 0;
endtask
endinterface
virtual some_intf some_vif;
I have a tool that complains about the line containing intf.some_signal <= 0. While intf.some_signal is a hierarchical reference, it's a relative reference, so I don't see why this would be disallowed.
intf is part of the interface body. I'm not sure how to interpret the ports that reference other interfaces part.